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                                    VLSI Design & Technology

Class: BE

Academic Year 2021-22 Sem-I

Savitribai Phule Pune University Pune

TEXT BOOKS:

  1. Charles H. Roth, “ Digital Systems design using VHDL”, PWS

  2. Wyane Wolf, “Modern VLSI Design (System on Chip)”, PHI Publication.

  3. Steve Kits “Advanced FPGA Design Architecture, Implementation and Optimization”, Wiley.

REFERENCE BOOKS:

  1. E.Weste, David Money Harris, “CMOS VLSI Design: A Circuit & System Perspective”, Pearson Publication.

  2. R.Jacob Baker,” CMOS circuit Design, Layout and Simulation”, 3E, Wiley-IEEE Press.

  3. John F. Wakerly,” Digital Design Principles and Practices”, 3E, Prentice Hall.

  4. M.Morris Mano,”Digital Design”, 3E, Pearson.

  5. Cem Unsalan, Bora Tar,” Digital System Design with FPGA: Implementation Using Verilog and VHDL,” McGraw-Hill.

  1. To write VHDL code, simulate with test bench, synthesis, implement on PLD 4 bit ALU for add, subtract, AND, NAND, XOR, XNOR, OR

  2. To write VHDL code, simulate with test bench, synthesis, implement on PLD bidirectional shift register

  3. To write VHDL code, simulate with test bench, synthesis, implement on PLD 16 byte  memory

  4. To write VHDL code, simulate with test bench, synthesis, implement on PLD keyboard interface.

  5. To prepare CMOS layout in selected technology, simulate with and without capacitive load, comment on rise, and fall times Inverter, NAND, NOR gates.

  6. To prepare CMOS layout in selected technology, simulate with and without capacitive load, comment on rise, and fall times 2:1 multiplexer using logic gates and transmission gates.

  7. To prepare CMOS layout in selected technology, simulate with and without capacitive load, comment on rise, and fall times Single bit SRAM cell.

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