Acerca de

1. University authority appoint as chairman for paper setter of subject “Digital Design & computer Organization” 2003 pattern of Savitribai Phule Pune University.

2. University authority appoint as  paper setter of subject  “signal coding and estimation theory” 2008 pattern,  “Computer organization” 2012 pattern, “VLSI Design & Technology” 2008 pattern and “VLSI EDA Tools” ME (VLSI & Embedded sys) of Savitribai Phule Pune University.

3. University appoint as External senior supervisor in MAE College of Engineering Alandi, Indira college of Engineering, parandwadi pune, SKN College of engineering vadgaon pune.

4. Paper setter and Examiner ME (Electronics) 2008 course paper-Digital Systems using PLDs. Date 16/03/2014.

5. Paper setter and Examiner ME (E & TC) 2013 course paper-Detection and Estimation Theory Date 16/03/2014.Paper setter and Examiner TE (E&TC) (End Sem) 2012 course paper-Information Theory & Coding Technique date 10/10/2015.

6. Paper setter and Examiner SE (E&TC) 2012 course paper-Computer Organization date 24/02/2014.

7. Paper setter and Examiner ME (VLSI and Embedded System) paper-VLSI EDA Tools                      date 25/03/2015.    

8. Chairman in the subject of TE (E &TC) 2008 course paper-Signal Coding & Estimation Theory date 24/08/2016.

9. Paper setter and Examiner BE (E & TC) 2012 course paper-VLSI Design & Technology date 17/08/2016.

10. Paper setter and Examiner BE (E & TC) open elective paper- Programmable system on chip date 16/08/2016.

11. Paper setter and Examiner BE (E & TC) 2012 course paper-Micrelectromechanical System and system on chip date 16/08/2016.

12. Paper setter and Examiner BE (E & TC) 2012 course paper- Elective-IV Detection and Estimation Theory date 16/08/2016.

13. Paper setter and Examiner BE (E & TC) 2012 (Insem) course paper- VLSI Design & Technology Theory date 27/07/2016.

14. Paper setter and Examiner ME (VLSI and Embedded System) paper-VLSI EDA Tools .date 21/03/2016.

15. Paper setter and Examiner ME (VLSI and Embedded System) 2013 course paper-System on Chip .date 21/03/2016.

16. Paper setter and Examiner BE (E&TC) 2013 course paper-Micro electromechanical and system on chip .date 26/02/2016.

17. Paper setter and Examiner TE (E&TC) 2008 course paper- Signal Coding & Estimation Theory date 26/09/2013.

18. Paper setter and Examiner BE (E&TC) 2008 course  paper- VLSI Design & Technology .date 26/09/2013.

19. Chairman  in the subject of BE (E &TC) 2008 course paper- Programmable system on chip Theory date 09/02/2017. 

20. Chairman  in the subject of BE (E &TC) 2008 course paper- Programmable system on chip Theory date 05/09/2017.

21. Paper setter for ME E&TC (VLSI & Embedded system) 2017 course paper- Digital CMOS Design date 23/09/2017.

22. Paper setter for ME Electronics (Digital system) 2017 course paper- Analog and Digital CMOS design date 23/09/2017.

23. Paper setter and examiner for BE 2012 pattern paper Elective-IV Detection and Estimation Theory on 06/03/2018.

24. Paper setter and examiner for ME (Digital system) 2017 course paper Analog and Digital CMOS design on 06/03/2018.

25. Paper setter and examiner for ME (VLSI) 2017 course paper Digital CMOS design on 06/03/2018.

26. Paper setter and examiner for ME (Digital system) 2017 course paper PLDs and ASIC Design on 06/03/2018.

27. Paper setter and examiner for BE (E&TC) 2012 pattern end sem subject: VLSI Design & Technology on 27/08/2018.

28. Paper setter and examiner for ME (Digital system) 2017 course paper Analog and Digital CMOS design on 08/01/2019.

29. Paper setter and Examiner BE (E&TC) 2012 course  paper- VLSI Design & Technology .date 04/12/2018.

30. Paper setter and examiner for ME (Digital system) 2017 course paper Analog and Digital CMOS design on 17/09/2018.

31. Paper setter and examiner for BE (E&TC) 2012 course paper Detection and Estimation Theory on 18/03/2019.

32. Paper setter and examiner for BE (E&TC) 2012 course paper VLSI Design & Technology on 02/05/2019.

33. Paper setter and examiner for BE (E&TC) 2015 course (Insem) paper Testing and verification for SOC Design on 06/03/2019.

34. Paper setter and examiner for ME (Digital system) 2013 course paper Microelectronics on 23/05/2019.

35. Paper setter and examiner for ME (Digital system) 2017 course paper PLD’s and ASIC Design on 23/05/2019.

36. Paper setter and examiner for ME (Digital system) 2017 course paper Digital CMOS Design on 15/03/2019.

37. Paper setter and examiner for ME (Digital system) 2017 course paper Analog and Digital CMOS Design  on 19/09/2020.

38. Chairman in the subject of ME (E &TC) 2017 & 2013 course paper- Analog CMOS Design Theory date 25/09/2020. 

39. Paper setter and examiner for TE (E&TC) 2015 course paper Fundamentals of HDL on 16/09/2020.

40. Paper setter and examiner for BE (E&TC) 2012 course paper RF Circuit Design on 12/03/2020.

41. Chairman in the subject of ME (E &TC) 2013 course paper- Analog CMOS Design Theory date 13/06/2021.   

42. Paper setter and examiner for ME (Digital system) 2017 course paper Analog and Digital CMOS Design on 08/06/2021.

43. Paper setter and examiner for BE (E&TC) 2015 course paper Programmable System on Chip on 22/02/2021.

44. Paper setter and examiner for BE (E&TC) 2012 course paper RF Circuit Design on 22/02/2021.

45. Chairman of “Digital CMOS Design” F Y M Tech Sem-I MSE 10/04/2021.

46. Chairman F Y M Tech ESE of Analog CMOS Design Exam date 15/09/2021.

47. Chairman of CMOS Design & Verification of T Y B Tech academic year 2021-22 Sem-II.

48. Chairman BE (2015 Course) sub: Programmable System on Chip” End sem of Savitribai Phule Pune University exam date 12/05/2022.

​

​

Successfully Working as SWO of Savitribai Phule Pune university pune from Academic year 2011-12 to 2013-14 and 2014-15 to 2016-17 Under SWO I am successfully conducted  “Karmaveer Bhaurao Patil Earn and Learn scheme “in RSCOE.